S2600BP Memory Support and Population Rules

Intel® S2600BP motherboard DIMM support and rules.

Each Intel® S2600BP motherboard processor includes two integrated memory controllers (IMC), each capable of supporting three DDR4 memory channels. Each memory channel is capable of supporting two DIMM slots. Channel A and channel D support two memory slots and B, C, E, and F supports one memory slot, for a total possible of 16 DIMMs.

The processor IMC supports the following:
  • For maximum memory performance, 12 DIMMs (one DIMM per channel) are recommended
  • Registered DIMMs (RDIMMs), Load Reduced DIMMs (LRDIMMs) and LRDIMM 3DS are supported
  • DIMMs of different types (RDIMM, LRDIMM) may not be mixed – this results in a Fatal Error during memory initialization at the beginning of POST
  • DIMMs using x4 or x8 DRAM technology DIMMs organized as Single Rank (SR), Dual Rank (DR), or Quad Rank (QR)
  • Maximum of 8 logical ranks per channel
  • Maximum of 10 physical ranks loaded on a channel
  • DIMM sizes of 4 GB, 8 GB, 16 GB, 32 GB, 64 GB and 128 GB depending on ranks and technology
  • DIMM speeds of 1600/1866/2133/2400/2666 MT/s
  • Only Error Correction Code (ECC) enabled RDIMMs or LRDIMMs are supported
  • Only RDIMMs and LRDIMMs with integrated Thermal Sensor On Die (TSOD) are supported

Memory Population Rules

Although mixed DIMM configurations are supported on the Intel® S2600BP motherboard, Cray performs platform validation only on systems that are configured with identical DIMMs installed. Each memory slot should be populated with identical DDR4 DIMMs.

  • The memory channels from processor socket 1 and processor socket 2 are identified as “CPU# plus A, B, C, D, E or F” respective channel.
  • The memory slots associated with a given processor are unavailable if the corresponding processor socket is not populated.
  • The silk screened DIMM slot identifiers on the board provide information about the channel, and therefore the processor to which they belong. For example, CPU1_DIMM_A1 is the first slot on Channel A on processor 1; CPU2_DIMM_A1 is the first DIMM socket on Channel A on processor 2.
  • A processor may be installed without populating the associated memory slots, if a second processor is installed along with its associated memory. In this case, the memory is shared by the processors. However, the platform suffers performance degradation and latency due to the remote memory.
  • The S2600BP uses a “2-1-1” configuration--populate first the slot closest to processor in the channel with 2 slots.
  • Processor sockets are self-contained and autonomous. However, all memory subsystem support (such as Memory RAS and Error Management) in the BIOS setup is applied commonly across processor sockets.
  • Mixing DIMMs of different frequencies and latencies is not supported within or across processor sockets.
  • A maximum of 8 logical ranks can be used on any one channel, as well as a maximum of 10 physical ranks loaded on a channel.
  • DIMM slot 1 closest to the processor socket must be populated first in the channel with 2 slots. Only remove factory installed DIMM blanks when populating the slot with memory. Intel MRC will check for correct DIMM placement